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A210 Datasheet

Copyright © 2026 Zhihe Computing Technology (Shanghai) Co., Ltd. All rights reserved.

This document is the property of Zhihe Computing Technology (Shanghai) Co., Ltd. (“Company”) and may not be disclosed, given or transferred to any third party without the Company's agreement or written consent. If this clause is violated and caused loss to the Company shall be liable for compensation.

Contacts

Zhihe Computing Technology (Shanghai) Co., Ltd.

Address: 12F, Building 3, Xingchuang Technology Plaza, Lane 5005, Shenjiang Road, Pudong New District, Shanghai

Email: business@zhcomputing.com

Telephone: 0571-87208790

Overview

Features

Microprocessor

  • Octa-core RISC-V 64GCV processor (4×C920 + 4×C908)

  • RISC-V 64GCV C920@1.9 GHz

    • 9 to 12 stage deep pipeline architecture

    • Superscalar architecture with 3-issue, 8-execution units (fully transparent to software)

    • In-order instruction fetch, out-of-order issue, out-of-order completion, and in-order retirement

    • 64 KB I Cache and 64 KB D Cache for each core

    • 1 MB L2 cache shared by 4 cores

    • Supports 588 GFlops@INT8/294 GFlops@FP16 vector operations

  • RISC-V 64GCV C908@1.9 GHz

    • 9 stage pipeline architecture

    • In-order instruction fetch, in-order dual-issue, in-order execution, and in-order retirement

    • 32 KB I Cache and 32 KB D Cache for each core

    • 512 KB L2 Cache shared by 4 cores

    • Supports 121.6 GFlops@INT8/60.8 GFlops@FP16 vector operations

  • Each core supports vector operations, implementing the RISC-V V Extension.

    • Supports vector operations in FP16/BF16/FP32/FP64 formats

    • Supports integer operations in INT8/INT16/INT32/INT64 formats

    • 128-bit vector register width

  • Little-endian mode

  • TEE and REE support

    • Supports independent executable domains

    • Provides isolation between zones

    • Provides isolation between applications, and between applications and kernels within a zone

    • Supports shared memory access across zones

    • Trusted communication between zones

    • The TEE environment is compliant with the Global Platform (GP) specification

  • SV39 Mode support

  • Two-level TLB MMU performs virtual-to-physical address translation and memory management

  • Floating-Point Unit (FPU) Support: half-precision (FP16), single-precision (FP32), and double-precision (FP64) floating-point operations

  • Supports DVFS


Neural Processing Unit

  • 12TOPS@INT8

  • DeepSeek-7B can reach 8 tokens/s

  • 4-Die multi-chip cascading DeepSeek-7B can reach 25 tokens/s

  • Supports INT4, INT8, INT16, FP8, FP16 and BF16

  • 2MB SRAM

  • Supports CNN, and RNN

  • Supports deep learning frameworks: TensorFlow, Caffe, HuggingFace, ONNX, etc.

  • Supports Transformer acceleration and LLM

  • Lossless weight data compression

  • Supports mixed-precision (INT4/FP16) computation


Graphics Processing Unit

  • Available APIs:

    • Vulkan 1.1/1.2

    • OpenCL 1.1/1.2/2.0

    • OpenGL ES 1.1/2.0/3.0/3.1/3.2

  • Tile-based 3D graphic rendering with parallel processing

  • Programmable high-quality anti-aliasing

  • Advanced DMA operations to reduce main CPU load

  • Compressed texture encoding

  • Lossless data compression

  • Dedicated firmware execution processor

  • Performance:

    • 50.34 GFLOPS operation

    • 3D graphics acceleration engine: 3.14 GPixel@786MHz

    • 64x F32 operations per cycle

    • 128x F16 operations per cycle

    • 32x integer operations per cycle

    • Geometric operations: 1 triangle operation per 4 clock cycles


Power Management Unit

  • 1× RISC-V E902@100MHz

  • 1× RTC

  • 1× POR

  • 1× Watchdog

  • Integrated Power Management Controller (PMC)


Memory Interface

  • LPDDR4/LPDDR4X

    • 2× 32-bit LPDDR4/LPDDR4X with a maximum data rate of 4266 Mbps

    • JEDEC standards LPDDR4-2133/LPDDR4-3200/LPDDR4-3733/LPDDR4-4266/LPDDR4X-2133/LPDDR4X-3200/LPDDR4X-3733/LPDDR4X-4266 SDRAM

    • Dual channels, 32-bit data width per channel

    • Up to 16GB for LPDDR4/4x

    • Supports configurable timing parameters across various LPDDR4/LPDDR4X SDRAMs

    • Command reordering and scheduling to maximize the bandwidth utilization

    • Programmable On-Die Termination (ODT), and dynamic PVT compensation

  • SPI NOR/NAND Flash interface

    • Dual QSPI and dual SPI, up to 52.625MHz

    • Data bus width: 1-bit, 2-bit or 4-bit

  • eMMC5.1 interface

    • JEDEC standards eMMC 5.1 and eMMC 5.0

    • Supports boot from eMMC

    • 8-bit data buses with HS400 (200MHz DDR) support

    • 8-bit data buses with HS200 (200MHz SDR) support

    • 8-bit data buses with DDR52 (52MHz DDR) support

    • Data bus width: 1-bit, 4-bit or 8-bit

  • SD 3.0 interface

    • Compliant with SD 3.0 specification

    • Single SD interface configurable as SD/SDIO with a maximum data bandwidth of 100 MB/s

    • Data bus width: 1-bit or 4-bit


Image Signal Processor

  • Supports up to 4 sensor inputs

  • Supports RAW 8/10/12-bit input

  • Supports up to 12 MPixel resolution

  • Supports LSC and Defect Pixel Correction (DPC)

  • Supports 3A (AE/AWB/AF) statistics output

  • Supports 2DNR, 3DNR and image sharpening

  • Supports distortion correction/fisheye correction

  • Supports True Wide Dynamic Range (WDR)


Dewarp Processor

  • Video scaling

    • Supports downscaling with a maximum reduction factor of 128x

    • Supports upscaling with a maximum magnification factor of 4x

    • Supports YUV and RGB888 output

    • Three scaling engines(SE) operating in parallel: SE0 (4K max output) + SE1 (1080P max output)+ SE2 (1080P max output)

  • Distortion correction, including fisheye correction, wide angle distortion correction, keystone correction, barrel distortion correction, etc.


Video Codec

  • Video decoding

    • H.265/HEVC decoding

      • Main/Main 10 Profile@level 5.2 with a maximum resolution of 4096x2160

      • Maximum decoding performance: 4K@120fps/16x1080P@30fps

    • H.264/AVC decoding

      • Baseline/Main/Main 10/High 10 Profile@level 5.2 with a maximum resolution of 4096x2160

      • Maximum decoding performance: 4K@120fps/16x1080P@30fps

    • AV1 decoding

      • AV1 Level 5.3 with a maximum resolution of 4096x2160

      • Maximum decoding performance: 4K@120fps/16x1080P@30fps

    • VP9 Profile0/2 with a maximum decoding performance of up to 4K@60fps

    • AVS2.0 Profile0/2 with a maximum decoding performance of up to 4K@60fps

    • VP6/7/8/AVS/AVS+/VC1/MPEG4 with a maximum decoding performance of up to 1920x1080@60fps

  • JPEG decoding

    • Compliant with ITU-T81 Baseline Profile

      • Supports JPEG decoding in YUV 4:0:0/YUV 4:2:0/YUV 4:2:2/YUV 4:4:4 formats

      • Supports decoding in sequential formats

      • Supports DCT-based JPEG decoding

      • Supports interlaced scan formats

      • Motion-JPEG is supported

    • Supported resolution range from 48x48 to 32768x32768

    • Maximum decoding performance for YUV4:2:0: 1080P@576fps

  • Video encoding

    • H.265/HEVC Main Profile with a maximum resolution of 4K

      • Motion Compensation: 1/2, 1/4 pixel precision

      • PU size in inter prediction: 64x64, 32x32, 16x16, 8x8

      • PU size in intra prediction: 32x32, 16x16, 8x8, 4x4

      • TU size: 32x32, 16x16, 8x8, 4x4

      • Entropy coding: CABAC

      • Supports Sample Adaptive Offset (SAO)

    • H.264 Baseline/Main/High Profile@level 4.2 with a maximum resolution of 4K

      • Motion Compensation: 1/2, 1/4 pixel precision

      • Inter prediction: sub-block types of 16x16, 16x8, and 8x16

      • Intra prediction: Intra4x4, Intra8x8, Intra16x16

      • Supports Trans4x4, Trans8x8

      • Entropy coding: CABAC, CAVLC

    • De-blocking filtering

    • Supports I/P frame encoding, and long-term reference frame

    • Supports Smart264/Smart 265 encoding

    • Supports QPMap/SkipMap

    • 8 Regions of Interest (ROI)

    • Bitrate Control mode: CBR/VBR/FIXQP/QPMAP

    • Maximum encoding performance: 4K@60fps

  • JPEG encoding

    • Compliant with ISO/IEC 10918-1(CCITT T.81) Baseline Process(DCT Sequential)

    • Supported JPEG encoding formats: Semi-Planar YUV 4:2:0, Semi-Planar YUV 4:2:2, Monochrome (YUV 4:0:0)

    • Supported resolution range from 32x32 to 16384x16384, with both width and height being multiples of 2

    • Maximum encoding resolution: 1080P@312fps

    • MJPEG encoding with an output bitrate range from 2kbps to 600Mbps

  • On-screen display (OSD) overlay is supported before the encoding stage


2D Graphics Accelerator

  • Input/Output

    • Supported format: 8/10-bit YUV 4:2:2/YUV 4:2:0, RGB444/RGB565/RGB888/RGB101010, ARGB4444/ARGB1555/ARGB8888/ARGB2101010

    • The data storage format is compatible with processing modules such as ISP, VENC, VDEC, NPU, DPU, and GPU

  • 2D operations

    • bitBlit

    • stretchBlit

    • rect fill & clear

    • filterblit

    • Alpha Blending

    • 90/180/270 rotation

    • scale/crop

    • line

    • RGB2YUV

    • YUV2RGB

  • Multi-src blit

    • Supports blending of up to 8 rectangular sources with different sizes

    • Enable independent rotation and scaling parameters for each source


Display Processing Unit

  • Multi-screen heterogeneous display: DP0 (up to 4K@60fps) + DP1 (1080P@60fps) + DP2 (720P@60fps)

  • DP0/DP1 channel

    • each has 1 cursor layer and 1 video layer

    • 4 shared layers can be assigned arbitrarily to DP0 or DP1

    • Supports dithering and Gamma correction lookup tables

    • Supports single-source mirror display/single-source scaling mirror display

  • DP2 channel exclusively reads data from system memory and outputs it directly


Video Interface

  • Video interface input

    • 4-lane MIPI CSI2 D-PHY interface, with flexible Lane Configurations of 2×4lane/4×2lane/1×4lane+2×2lane

    • Compliant with MIPI D-PHY v1.1/v1.2

    • Maximum speed: 2.5Gbps/lane

    • Input format: RAW10/RAW12

    • Maximum input resolution: 12 MPixel

  • Display interface

    • HDMI TX interface

      • Compliant with HDMI 1.4/2.0

      • Total bandwidth is up to 18 Gbps

      • Maximum output resolution: 4K@60fps

      • Supports audio output

      • Supports up to 10-bit YUV/RGB output

      • Supports HDCP 1.4

      • Supports Hot Plug Detection(HPD)

    • MIPI DSI interface

      • 1x 4-lane MIPI DSI D-PHY with a maximum resolution of 4K@60fps

      • Compliant with MIPI D-PHY v1.1/v1.2

      • Maximum speed: 2.5 Gbps/lane

      • Supports up to 8bit YUV/RGB output

    • USB3.1/DP/eDP combo interface

      • 1x USB3.1/DP 1.4/eDP1.5 combo interface

        • Supports USB 3.1 output via a Type-C interface

        • Supports USB 3.1+2 lane DP via a Type-C interface

        • Supports USB 2.0+4 lane DP output via a Type-C interface

        • Supports USB 3.1 output via a Type-A interface +2-lane DP/eDP interface

        • Supports USB 2.0 output via a Type-A/C interface +4-lane DP/eDP interface

      • DP/eDP features

        • DP/eDP output with a maximum resolution of 4K@60fps

        • Supports audio output

        • Supports up to 10-bit YUV/RGB output

        • Supports HDCP 1.3

      • Supports Hot Plug Detection(HPD)


Audio Interface

  • 1x 8-lane I2S/PCM interface

    • Supports full-duplex for RX/TX

    • Supports sample rate up to 384kHz

    • Audio resolution: 16bit, 24bit, and 32bit

    • Supports master mode

    • Supports 3 I2S formats (normal, left-Justified, right-Justified)

  • 3x 2-lane I2S/PCM interface

    • Supports full-duplex for RX/TX

    • Supports sample rate up to 384kHz

    • Audio resolution: 16bit, 24bit, and 32bit

    • Supports master mode

    • Supports 3 I2S formats (normal, left-Justified, right-Justified)

  • 1x PDM interface

    • Up to 8 channels

    • Supports sample rate up to 192kHz

    • Audio resolution: 16bit, 24bit

  • 1x TDM/PCM interface

    • Supports TDM input

    • Up to 8 channels

    • Supports sample rate up to 192kHz

    • Audio resolution: 16bit, 24bit, and 32bit

    • Supports master/slave mode


Security

  • Dual-layer security: TEE+REE

  • Encryption algorithm

    • Symmetrical algorithms: AES, TDES, DES, SM4

    • Asymmetrical algorithms: RSA1024/2048/3072/4096, SM2

    • HASH algorithms: SHA-1/224/256/384/512, SM3, MD5

  • Hardware random number generator (HRNG)

  • Hardware-enforced isolation

  • Supports secure boot


Connectivity

  • Supports POR

  • Supports external reset

  • Internal RTC

  • 4-channel ADC

  • 10x UART ports

  • 10x I2C ports

  • 2x QSPI ports and 2x SPI ports

  • 2x GMAC ports with RGMII/RMII support

  • 3x 6-channel PWM ports

  • 1x eMMC5.0/5.1 port

  • 1x SD3.0/SDIO3.0 port

  • 1x USB3.1/DP1.4/eDP1.5 Combo interface. The USB 3.1 interface can be configured as host or device mode

  • 2x USB 2.0 interfaces can be configured as host or device mode

  • 1x PCIe3.1/SATA3.0 Combo interface, supports the following configurations:

    • 1 x4 RC/EP

    • 1 x2 RC/EP+1 x1 RC

    • 1 x2 RC/EP+2 SATA

    • 1 x1 RC/EP+1 x1 RC+2 SATA

  • Integrated JTAG, GPIO, etc.

  • 3x CAN interfaces, supporting CAN-FD

  • Integrated chip cascade interface, supporting board-level interconnection


Physical Specifications

  • Power consumption

    • Multi-level low-power mode
  • Operating voltage

    • Voltage for core: 0.8V

    • Voltage for IO: 1.8V

    • Voltage for LPDDR4 IO: 1.1V

    • Voltage for LPDDR4x IO: 0.6V

  • Package

    • RoHS, FC-BGA

Block Diagram

Block Diagram

Package Information

Package Dimension

尺寸1

尺寸2

AxisSymbolCommon Dimensions
MIN.NOM.MAX.
Body Size:XE24.80025.00025.200
YD24.80025.00025.200
Ball Pitch:e0.6
Total Thickness:A1.7681.8892.010
Lid Height:0.875 Ref.
Substrate Thickness:0.6440.7540.864
Ball Diameter:0.300
Stand Off:A10.1600.2100.260
Ball Width:b0.2600.3100.360
Package Edge Tolerance:aaa0.200
Lid Flatness:ccc0.050
Coplanarity:ddd0.150
Ball Offset (Package):eee0.200
Ball Offset (Ball):fff0.080
Ball Count:n1373
Edge Ball Center to Center:XE123.400
YD123.400
Edge Ball Center to Package Edge:Xg0.800 Ref.
Yf0.800 Ref.

Note:

PKG total thickness (A) does not include the warpage value.


Top Marking

label

Thermal Management

SymbolParameterTypicalUnit
θJAJunction-to-ambient thermal resistance
Airflow velocity: 0 m/s (still air)
7.53°C/W
θJBJunction-to-board thermal resistance
Airflow velocity: 0 m/s (still air)
2.86°C/W
θJCJunction-to-case thermal resistance
Airflow velocity: 0 m/s (still air)
0.31°C/W

Note:

The thermal resistance parameters are specified per the JESD51-2 standard. Their actual values depend on specific conditions such as PCB design, dimensions, thickness, materials, and other physical factors, and require evaluation based on the actual application.


MSL Information

Moisture sensitivity Level(MSL): 4


Pin Description

Ball Map

Ballmap


Pin Number List

PinPin NamePinPin NamePinPin Name
A2VSSAF16DVDD08_TOPAP17VSS
A3GPIO0_3AF17DVDD08_TOPAP18VSS
A4GPIO0_0AF18DVDD_CPU_PAP19AVDD33_EMMC
A5GPIO0_10AF19DVDD_CPU_PAP20VSS
A6GPIO0_8AF20DVDD_CPU_PAP21AVDD18_EMMC
A7GPIO0_1AF21DVDDM_CPUAP22VSS
A8GPIO0_19AF22DVDD_CPUAP23VSS
A9GPIO0_22AF23DVDD_CPUAP24VSS
A10GPIO0_18AF24AVDD06_DDR_VDDQLP_1AP25VSS
A11GPIO1_1AF25DVDD08_DDRAP26VSS
A12GPIO0_29AF26DVDD08_DDRAP27VSS
A13GPIO0_30AF27DVDD08_DDRAP28VSS
A14AOGPIO0_26AF28DVDD08_DDRAP29VSS
A15AOGPIO0_29AF29VSSAP30VSS
A16AOGPIO1_1AF30DVDD08_DDRAP31VSS
A17AOGPIO1_7AF31VSSAP32VSS
A18AOGPIO1_9AF34VSSAP33VSS
A19MIPI_CSI0_A_CLKPAF35VSSAP34VSS
A21MIPI_CSI0_A_DATAP1AF36DDR0_A3AP35VSS
A22MIPI_CSI1_A_CLKPAF37DDR0_A5AP36DDR1_DQ13
A24MIPI_CSI1_A_DATAP1AF38VSSAP37DDR1_DQ12
A25MIPI_DSI0_DATAN0AF39VSSAP38VSS
A27MIPI_DSI0_DATAN1AF40DDR0_CLK0TAP39DDR1_DQ15
A28HDMI_TMDSDATAP2AG1M1_B_DQ0AP40DDR1_DQ14
A30HDMI_TMDSDATAP0AG2VSSAR2PCIE_SATA_1_RX3_P
A31USB3_DPTX_TX3_MAG3M1_B_DVAR3PCIE_SATA_1_RX3_M
A33USB3_DPTX_TX0_MAG4VSSAR4VSS
A34USB3_DPTXRX_TXRX1_PAG5M1_B_DQ5AR5VSS
A35USB2_2_DPAG6VSSAR6ADC_VIN_CH2_P
A37USB2_0_DPAG7VSSAR7VSS
A38GPIO2_22AG11VSSAR8VSS
A39VSSAG12VSSAR9EMMC_CMD
AA1M1_A_SBDAAG13VSSAR10EMMC_DAT7
AA2VSSAG14VSSAR11VSS
AA3M0_A_SBDAAG15VSSAR12DDR3_DQSTL
AA4VSSAG16VSSAR13VSS
AA5D2D_REFCLKPADAG17DVDD08_TOPAR14VSS
AA6VSSAG18VSSAR15DDR3_DQSTU
AA7VSSAG19VSSAR16VSS
AA11VSSAG20VSSAR17VSS
AA12VSSAG21VSSAR18DDR1_C1
AA13VSSAG22VSSAR19DDR1_C2
AA14DVDD08_TOPAG23VSSAR20VSS
AA15DVDD08_TOPAG24AVDD06_DDR_VDDQLP_1AR21DDR1_BA0
AA16DVDD08_TOPAG25DVDD08_DDRAR22DDR1_A4
AA17VSSAG26DVDD08_DDRAR23VSS
AA18VSSAG27VSSAR24DDR1_A3
AA19VSSAG28VSSAR25DDR1_A7
AA20VSSAG29VSSAR26VSS
AA21VSSAG30VSSAR27DDR1_CKE1
AA22AVDD18_TOPAG31VSSAR28DDR1_C0
AA23VSSAG34VSSAR29VSS
AA24DVDD08_TOPAG35VSSAR30DDR2_DQSTL
AA25DVDD_NPUAG36DDR0_A0AR31VSS
AA26DVDD_NPUAG37VSSAR32VSS
AA27VSSAG38DDR0_VREFAR33DDR2_DQSTU
AA28VSSAG39DDR0_CLK0CAR34VSS
AA29DVDD08_DDRAG40VSSAR35DDR1_DQSTU
AA30VSSAH1VSSAR36DDR1_DQSCU
AA31AVDD12_DDR_VDDQ_0AH2M1_A_DQ0AR37DDR1_DMU
AA32VSSAH3VSSAR38VSS
AA34VSSAH4M1_A_DQ4AR39VSS
AA35VSSAH5VSSAR40DDR1_DQ11
AA36DDR0_DQ7AH6M1_A_DQ5AT1PCIE_SATA_1_TX3_M
AA37VSSAH7VSSAT2PCIE_SATA_1_TX3_P
AA38DDR0_DQ5AH11VSSAT3VSS
AA39DDR0_DQ1AH12VSSAT4PCIE_SATA_1_REFCLK_P
AA40DDR0_DQ4AH13AVDD18_PCIE3AT5PCIE_SATA_1_REFCLK_M
AB1VSSAH14AVDD18_PCIE3AT6ADC_VIN_CH3_P
AB2M1_B_SBDAAH15VSSAT7VSS
AB3VSSAH16VSSAT8EMMC_CLK
AB4M0_B_SBDAAH17AVDD18_TOPAT9EMMC_DS
AB5VSSAH18DVDD_CPU_PAT10VSS
AB6D2D_REXT1KAH19DVDD_CPU_PAT11DDR3_DQ5
AB7VSSAH20DVDD_CPU_PAT12DDR3_DQSCL
AB8VSSAH21VSSAT13VSS
AB10VSSAH22DVDD_CPUAT14VSS
AB11VSSAH23DVDD_CPUAT15DDR3_DQSCU
AB12VSSAH24VSSAT16DDR3_DQ13
AB13DVDD08_D2DAH25AVDD18_DDR_VAA_1AT17DDR1_CSN1
AB14DVDD08_D2DAH26VSSAT18DDR1_ODT1
AB15VSSAH27DVDD08_DDRAT19VSS
AB16DVDD08_TOPAH28DVDD08_DDRAT20DDR1_A10
AB17DVDD_CPU_PAH29DVDD08_DDRAT21DDR1_X0
AB18DVDD_CPU_PAH30VSSAT22VSS
AB19DVDD_CPU_PAH34VSSAT23DDR1_A0
AB20DVDD_CPU_PAH35DDR0_A4AT24DDR1_A5
AB21DVDDM_CPUAH36VSSAT25VSS
AB22DVDD_CPUAH37DDR0_X1AT26DDR1_A11
AB23DVDD_CPUAH38VSSAT27DDR1_ALERT_N
AB24VSSAH39DDR0_CLK1TAT28VSS
AB25DVDD08_TOPAH40DDR0_ZN_SENSEAT29DDR2_DQ7
AB26AVSS_PLLAJ1M1_A_DQ1AT30DDR2_DQSCL
AB27AVDD06_DDR_VDDQLP_0AJ2VSSAT31VSS
AB28DVDD08_DDRAJ3M1_A_DVAT32VSS
AB29AVDD18_DDR_VAA_0AJ4VSSAT33DDR2_DQSCU
AB30AVDD12_DDR_VDDQ_0AJ5M1_A_WCKAT34DDR2_DQ13
AB31AVDD12_DDR_VDDQ_0AJ6VSSAT35VSS
AB32VSSAJ7VSSAT36VSS
AB34VSSAJ12VSSAT37VSS
AB35DDR0_C0AJ13VSSAT38DDR1_DQ9
AB36VSSAJ14VSSAT39DDR1_DQ10
AB37VSSAJ15VSSAT40DDR1_DQ8
AB38VSSAJ16VSSAU2PCIE_SATA_1_TX2_M
AB39DDR0_A6AJ17VSSAU3PCIE_SATA_1_TX2_P
AB40DDR0_A8AJ18VSSAU4VSS
AC1M1_B_SBCKAJ19VSSAU5VSS
AC2VSSAJ20VSSAU6ADC_VIN_CH0_P
AC3M0_B_SBCKAJ21VSSAU7ADC_VIN_CH1_P
AC4VSSAJ22VSSAU8VSS
AC5D2D_A_OBSAJ23VSSAU9EMMC_RSTN
AC6VSSAJ24AVDD12_DDR_VDDQ_1AU10EMMC_DAT2
AC7AVDD18_D2DAJ25AVDD12_DDR_VDDQ_1AU11VSS
AC8VSSAJ26VSSAU12DDR3_DQ4
AC10VSSAJ27VSSAU13DDR3_DML
AC11VSSAJ28VSSAU14VSS
AC12VSSAJ29VSSAU15DDR3_DMU
AC13VSSAJ34VSSAU16DDR3_DQ12
AC14VSSAJ35VSSAU17VSS
AC15VSSAJ36DDR0_BA0AU18VSS
AC16DVDD08_TOPAJ37DDR0_X0AU19DDR1_A14
AC17VSSAJ38VSSAU20VSS
AC18VSSAJ39VSSAU21VSS
AC19VSSAJ40DDR0_CLK1CAU22DDR1_X1
AC20VSSAK1VSSAU23VSS
AC21VSSAK2M1_A_DQ2AU24VSS
AC22VSSAK3VSSAU25DDR1_A9
AC23VSSAK4M1_A_DQ6AU26VSS
AC24AVDD18_PLLAK5VSSAU27VSS
AC25DVDD08_PLLAK6M1_A_WCKBAU28VSS
AC26VSSAK7VSSAU29VSS
AC27AVDD06_DDR_VDDQLP_0AK16VSSAU30DDR2_DQ6
AC28DVDD08_DDRAK17DVDD_CPU_PAU31DDR2_DML
AC29VSSAK18DVDD_CPU_PAU32VSS
AC30AVDD12_DDR_VDDQ_0AK19DVDD_CPU_PAU33DDR2_DMU
AC31AVDD12_DDR_VDDQ_0AK20DVDD_CPU_PAU34DDR2_DQ12
AC32VSSAK21VSSAU35VSS
AC34VSSAK22VSSAU36VSS
AC35VSSAK23AVDD12_DDR_VDDQ_1AU37DDR1_DML
AC36DDR0_CKE1AK24AVDD12_DDR_VDDQ_1AU38VSS
AC37DDR0_ALERT_NAK25AVDD12_DDR_VDDQ_1AU39DDR1_DQ1
AC38VSSAK26AVDD12_DDR_VDDQ_1AU40DDR1_DQ0
AC39VSSAK27VSSAV1PCIE_SATA_0_TX1_M
AC40DDR0_A12AK28VSSAV2PCIE_SATA_0_TX1_P
AD1VSSAK34VSSAV3VSS
AD2M1_B_DQ3AK35VSSAV4VSS
AD3VSSAK36DDR0_A10AV5SDIO_CLK
AD4M1_B_DQ6AK37VSSAV6VSS
AD5VSSAK38DDR0_A15AV7VSS
AD6M1_B_DQ7AK39DDR0_ODT0AV8EMMC_DAT0
AD7VSSAK40DDR0_A16AV9VSS
AD8VSSAL1M1_A_DQ3AV10VSS
AD10VSSAL2VSSAV11DDR3_DQ6
AD11AVDD08_D2DAL3M1_A_DXAV12VSS
AD12AVDD08_D2DAL4VSSAV13VSS
AD13DVDD08_D2DAL5M1_A_DQ7AV14DDR3_DQ9
AD14DVDD08_D2DAL6VSSAV15VSS
AD15DVDD08_D2DAL7VSSAV16VSS
AD16DVDD08_TOPAL16VSSAV17DDR1_PAR
AD17DVDD_CPU_PAL17VSSAV18VSS
AD18DVDD_CPU_PAL18VSSAV19VSS
AD19DVDD_CPU_PAL19VSSAV20DDR1_A15
AD20DVDD_CPU_PAL20VSSAV21VSS
AD21DVDD_CPUAL21VSSAV22VSS
AD22DVDD_CPUAL22VSSAV23DDR1_VREF
AD23DVDD_CPUAL23VSSAV24VSS
AD24DVDD08_DDRAL24VSSAV25VSS
AD25DVDD08_DDRAL25VSSAV26DDR1_CSN0
AD26DVDD08_DDRAL26VSSAV27VSS
AD27DVDD08_DDRAL27VSSAV28VSS
AD28DVDD08_DDRAL34VSSAV29DDR2_DQ5
AD29DVDD08_DDRAL35DDR0_C2AV30VSS
AD30VSSAL36VSSAV31VSS
AD31AVDD12_DDR_VDDQ_0AL37DDR0_A14AV32DDR2_DQ8
AD32VSSAL38VSSAV33VSS
AD34VSSAL39DDR0_A1AV34VSS
AD35VSSAL40DDR0_BA1AV35DDR1_DQSTL
AD36DDR0_A11AM1PCIE_SATA_0_RX0_PAV36DDR1_DQSCL
AD37VSSAM2PCIE_SATA_0_RX0_MAV37DDR1_DQ4
AD38DDR0_CSN0AM3VSSAV38VSS
AD39DDR0_BG1AM4VSSAV39VSS
AD40DDR0_BG0AM5VSSAV40DDR1_DQ2
AE1M1_B_DQ2AM6VSSAW1VSS
AE2VSSAM7VSSAW2PCIE_SATA_0_TX0_M
AE3M1_B_DXAM34VSSAW3PCIE_SATA_0_TX0_P
AE4VSSAM35VSSAW4VSS
AE5M1_B_WCKBAM36DDR0_C1AW5SDIO_DAT1
AE6VSSAM37DDR0_ODT1AW6VSS
AE7VSSAM38VSSAW7SDIO_DAT3
AE11VSSAM39VSSAW8EMMC_DAT3
AE12VSSAM40DDR0_A2AW9VSS
AE13VSSAN2PCIE_SATA_0_RX1_PAW10EMMC_DAT1
AE14VSSAN3PCIE_SATA_0_RX1_MAW11DDR3_DQ3
AE15VSSAN4VSSAW12VSS
AE16DVDD08_TOPAN5VSSAW13DDR3_DQ1
AE17VSSAN6PVT_VIN_HI_0AW14DDR3_DQ10
AE18VSSAN7VSSAW15VSS
AE19VSSAN8VSSAW16DDR3_DQ15
AE20VSSAN16VSSAW17DDR1_RSTN
AE21VSSAN17VSSAW18VSS
AE22VSSAN18AVDD33_EMMCAW19DDR1_A1
AE23VSSAN19VSSAW20DDR1_ODT0
AE24VSSAN20AVDD18_EMMCAW21VSS
AE25VSSAN21VSSAW22DDR1_CLK1T
AE26VSSAN22AVDD18_EFUSEAW23DDR1_CLK0C
AE27VSSAN23VSSAW24VSS
AE28VSSAN33VSSAW25DDR1_CKE0
AE29VSSAN34VSSAW26DDR1_BG1
AE30DVDD08_DDRAN35VSSAW27VSS
AE31VSSAN36DDR0_CSN1AW28DDR1_A6
AE32VSSAN37VSSAW29DDR2_DQ1
AE34VSSAN38DDR0_PARAW30VSS
AE35DDR0_A7AN39DDR0_RSTNAW31DDR2_DQ3
AE36VSSAN40DDR0_A13AW32DDR2_DQ11
AE37DDR0_A9AP1PCIE_SATA_1_RX2_PAW33VSS
AE38VSSAP2PCIE_SATA_1_RX2_MAW34DDR2_DQ15
AE39DDR0_CKE0AP3VSSAW35VSS
AE40DDR0_ACTNAP4PCIE_SATA_0_REFCLK_PAW36DDR1_DQ5
AF1VSSAP5PCIE_SATA_0_REFCLK_MAW37VSS
AF2M1_B_DQ1AP6VSSAW38DDR1_DQ3
AF3VSSAP7PVT_VIN_LO_0AW39DDR1_DQ7
AF4M1_B_DQ4AP8VSSAW40VSS
AF5VSSAP9VSSAY2VSS
AF6M1_B_WCKAP10VSSAY3PCIE_SATA_RESREF
AF7VSSAP11VSSAY4ADC_DISLVL
AF11VSSAP12VSSAY5SDIO_DAT0
AF12AVDD08_PCIE3AP13VSSAY6SDIO_CMD
AF13AVDD08_PCIE3AP14VSSAY7SDIO_DAT2
AF14AVDD08_PCIE3AP15VSSAY8EMMC_DAT4
AF15AVDD08_PCIE3AP16VSSAY9EMMC_DAT5
AY10EMMC_DAT6F39GPIO3_1P23DVDD08_TOP
AY11DDR3_DQ7F40GPIO2_0P24DVDD08_TOP
AY12DDR3_DQ2G1GPIO1_11P25DVDD08_TOP
AY13DDR3_DQ0G2VSSP26VSS
AY14DDR3_DQ8G3VSSP27VSS
AY15DDR3_DQ11G4AOUART_RXDP28VSS
AY16DDR3_DQ14G5AOUART_TXDP29DVDD_NPU_VIP
AY17DDR1_A13G6AOGPIO0_23P30VSS
AY18DDR1_A2G7VSSP31VSS
AY19DDR1_BA1G8VSSP34VSS
AY20DDR1_A16G9VSSP35GPIO2_9
AY21DDR1_CLK1CG10VSSP36GPIO2_7
AY22DDR1_ZN_SENSEG11VSSP37GPIO2_6
AY23VSSG12VSSP38VSS
AY24DDR1_CLK0TG13VSSP39VSS
AY25DDR1_ACTNG14VSSP40GPIO2_20
AY26DDR1_BG0G15VSSR1M0_B_DQ0
AY27DDR1_A12G16VSSR2VSS
AY28DDR1_A8G17AVDD08_MIPIR3M0_B_DV
AY29DDR2_DQ4G18VSSR4VSS
AY30DDR2_DQ0G19MIPI_CSI0_B_DATAN1R5M0_B_DQ5
AY31DDR2_DQ2G20VSSR6VSS
AY32DDR2_DQ9G21VSSR7VSS
AY33DDR2_DQ14G22MIPI_CSI1_B_DATAN1R11VSS
AY34DDR2_DQ10G23VSSR12VSS
AY35VSSG24VSSR13DVDD08_AON
AY36VSSG25MIPI_DSI0_REXTR14VSS
AY37VSSG26VSSR15DVDD08_TOP
AY38DDR1_DQ6G27AVDD18_MIPIR16DVDD08_TOP
AY39VSSG28VSSR17DVDD08_TOP
B1VSSG29VSSR18DVDD08_TOP
B2GPIO0_5G30HDMI_HPDR19DVDD08_TOP
B3GPIO0_2G31VSSR20VSS
B4GPIO0_11G32DPTX_AUX_PR21DVDD_GPU
B5VSSG33AVDD33_USB2R22VSS
B6GPIO0_7G34VSSR23DVDD_NPU_VIP
B7GPIO1_0G35USB2_2_VBUSR24DVDD_NPU_VIP
B8VSSG36VSSR25DVDD_NPU_VIP
B9GPIO0_20G37USB2_0_VBUSR26DVDD_NPU_VIP
B10GPIO0_23G38VSSR27DVDD_NPU_VIP
B11VSSG39GPIO2_1R28DVDD_NPU_VIP
B12GPIO0_28G40GPIO2_4R29DVDD_NPU_VIP
B13GPIO0_14H1GPIO1_13R30DVDD_NPU_VIP
B14VSSH2GPIO1_12R31VSS
B15AOGPIO0_27H3VSSR34VSS
B16AOGPIO0_31H4CPU_JTG_TDIR35VSS
B17VSSH5VSSR36GPIO2_5
B18AOI2C0_SCLH6CPU_JTG_TDOR37VSS
B19MIPI_CSI0_A_CLKNH7VSSR38VSS
B20MIPI_CSI0_A_DATAP0H8VSSR39GPIO2_14
B21MIPI_CSI0_A_DATAN1H16VSSR40VSS
B22MIPI_CSI1_A_CLKNH17VSST1VSS
B23MIPI_CSI1_A_DATAP0H18AVDD08_MIPIT2M0_A_DQ0
B24MIPI_CSI1_A_DATAN1H19VSST3VSS
B25MIPI_DSI0_DATAP0H20MIPI_CSI0_A_REXTT4M0_A_DQ4
B26MIPI_DSI0_CLKNH21AVDD08_USB3T5VSS
B27MIPI_DSI0_DATAP1H22VSST6M0_A_DQ5
B28HDMI_TMDSDATAN2H23MIPI_CSI1_A_REXTT7VSS
B29HDMI_TMDSDATAP1H24VSST11VSS
B30HDMI_TMDSDATAN0H25VSST12VSS
B31USB3_DPTX_TX3_PH26AVDD18_USB3T13VSS
B32USB3_DPTXRX_TXRX2_PH27VSST14DVDD08_TOP
B33USB3_DPTX_TX0_PH28VSST15DVDD08_TOP
B34USB3_DPTXRX_TXRX1_MH29VSST16VSS
B35USB2_2_DMH30AVDD18_USB2T17VSS
B36USB2_1_DPH31VSST18DVDD08_TOP
B37USB2_0_DMH32DVDD08_USB2T19DVDD08_TOP
B38GPIO2_21H33VSST20VSS
B39GPIO2_19H34VSST21DVDD_GPU
B40VSSH35GPIO2_31T22VSS
C1VSSH36USB2_1_VBUST23VSS
C2GPIO0_6H37GPIO2_28T24VSS
C3GPIO0_4H38VSST25VSS
C4VSSH39VSST26VSS
C5VSSH40GPIO3_3T27VSS
C6GPIO0_9J1GPIO1_4T28VSS
C7VSSJ2GPIO1_2T29VSS
C8VSSJ3GPIO1_5T30VSS
C9GPIO0_21J4VSST31VSS
C10VSSJ5CPU_JTG_TCLKT34VSS
C11VSSJ6VSST35VSS
C12GPIO0_31J7VSST36DDR0_DQ13
C13VSSJ16VSST37DDR0_DQ12
C14VSSJ17VSST38VSS
C15AOGPIO0_28J18VSST39DDR0_DQ15
C16VSSJ19VSST40DDR0_DQ10
C17VSSJ20VSSU1M0_A_DQ1
C18AOGPIO1_8J21VSSU2VSS
C19VSSJ22AVDD08_USB3U3M0_A_DV
C20MIPI_CSI0_A_DATAN0J23VSSU4VSS
C21VSSJ24VSSU5M0_A_WCK
C22VSSJ25VSSU6VSS
C23MIPI_CSI1_A_DATAN0J26VSSU7VSS
C24VSSJ27VSSU11VSS
C25VSSJ28VSSU12VSS
C26MIPI_DSI0_CLKPJ29VSSU13DVDD08_TOP
C27VSSJ30VSSU14VSS
C28VSSJ31VSSU15DVDD_VP
C29HDMI_TMDSDATAN1J32VSSU16VSS
C30VSSJ33VSSU17DVDD_VP
C31VSSJ34VSSU18VSS
C32USB3_DPTXRX_TXRX2_MJ35VSSU19DVDD08_TOP
C33VSSJ36GPIO2_30U20VSS
C34VSSJ37VSSU21DVDD_GPU
C35VSSJ38GPIO3_9U22VSS
C36USB2_1_DMJ39GPIO3_6U23DVDD_NPU_VIP
C37VSSJ40GPIO2_29U24DVDD_NPU_VIP
C38GPIO2_17K1GPIO1_6U25DVDD_NPU_VIP
C39GPIO2_18K2VSSU26DVDD_NPU_VIP
C40GPIO3_4K3VSSU27DVDD_NPU_VIP
D1RTC_CLK_OUTK4CPU_JTG_TMSU28DVDD_NPU_VIP
D2RTC_CLK_INK5CPU_JTG_TRSTU29DVDD_NPU_VIP
D3VSSK6GPIO1_14U30DVDD_NPU_VIP
D4TEST_MODEK7VSSU31VSS
D5DEBUG_MODEK19VSSU34VSS
D6VSSK20VSSU35DDR0_DQSTU
D7BOOT_SEL0K21VSSU36DDR0_DQSCU
D8GPIO0_16K22VSSU37DDR0_DMU
D9VSSK23VSSU38VSS
D10BOOT_SEL1K24VSSU39VSS
D11GPIO0_27K25VSSU40DDR0_DQ14
D12VSSK33VSSV1VSS
D13GPIO0_26K34VSSV2M0_A_DQ2
D14RST_N_INK35GPIO2_25V3VSS
D15VSSK36VSSV4M0_A_DQ6
D16GPIO0_17K37GPIO2_12V5VSS
D17AOGPIO1_4K38VSSV6M0_A_WCKB
D18VSSK39GPIO3_5V7VSS
D19VSSK40GPIO3_7V11VSS
D20VSSL1GPIO1_7V12VSS
D21MIPI_CSI0_B_CLKPL2GPIO1_8V13DVDD_VP
D22VSSL3VSSV14VSS
D23VSSL4AOGPIO0_21V15DVDD_VP
D24MIPI_CSI1_B_CLKPL5VSSV16VSS
D25VSSL6GPIO1_15V17DVDD_VP
D26VSSL7VSSV18VSS
D27MIPI_DSI0_DATAN3L34VSSV19DVDD08_TOP
D28VSSL35GPIO2_26V20VSS
D29VSSL36GPIO2_16V21DVDD_GPU
D30HDMI_REXTL37GPIO2_15V22VSS
D31VSSL38VSSV23DVDD_GPU
D32VSSL39VSSV24VSS
D33USB3_DPTX_REFCLK_ML40GPIO3_2V25VSS
D34VSSM1VSSV26VSS
D35USB2_2_TXRTUNEM2M0_B_DQ3V27VSS
D36VSSM3VSSV28VSS
D37USB2_0_TXRTUNEM4M0_B_DQ6V29VSS
D38VSSM5VSSV30VSS
D39GPIO2_2M6M0_B_DQ7V31VSS
D40GPIO3_10M7VSSV34VSS
E1OSC_CLK_INM13VSSV35VSS
E2OSC_CLK_OUTM14VSSV36VSS
E3GPIO1_3M15VSSV37VSS
E4VSSM16VSSV38DDR0_DQ8
E5AOGPIO0_22M17VSSV39DDR0_DQ11
E6POR_SELM18VSSV40DDR0_DQ9
E7VSSM19VSSW1M0_A_DQ3
E8GPIO0_24M20VSSW2VSS
E9GPIO0_15M21VSSW3M0_A_DX
E10VSSM22VSSW4VSS
E11AOI2C1_SCLM23VSSW5M0_A_DQ7
E12AOGPIO1_5M24VSSW6VSS
E13VSSM25VSSW7VSS
E14AOGPIO1_6M26AVDD18_PERI2W11VSS
E15AOGPIO0_25M27VSSW12AVDD18_PERI1
E16VSSM28VSSW13DVDD_VP
E17AOGPIO1_3M29VSSW14VSS
E18AOI2C0_SDAM30VSSW15DVDD_VP
E19VSSM34VSSW16VSS
E20MIPI_CSI0_B_DATAP0M35VSSW17DVDD_VP
E21MIPI_CSI0_B_CLKNM36GPIO2_10W18VSS
E22VSSM37VSSW19DVDD08_TOP
E23MIPI_CSI1_B_DATAP0M38GPIO2_13W20VSS
E24MIPI_CSI1_B_CLKNM39GPIO3_8W21DVDD_GPU
E25VSSM40GPIO2_27W22VSS
E26MIPI_DSI0_DATAN2N1M0_B_DQ2W23DVDD_GPU
E27MIPI_DSI0_DATAP3N2VSSW24DVDD_NPU
E28VSSN3M0_B_DXW25DVDD_NPU
E29HDMI_TMDSCLKPN4VSSW26DVDD_NPU
E30VSSN5M0_B_WCKBW27DVDD_NPU
E31VSSN6VSSW28DVDD_NPU
E32USB3_DPTX_RESREFN7VSSW29DVDD_NPU
E33USB3_DPTX_REFCLK_PN12VSSW30DVDD_NPU
E34VSSN13AVDD18_AONW31VSS
E35USB2_2_IDN14VSSW34VSS
E36USB2_1_TXRTUNEN15VSSW35VSS
E37USB2_0_IDN16VSSW36VSS
E38VSSN17VSSW37DDR0_DML
E39VSSN18VSSW38VSS
E40GPIO3_0N19VSSW39DDR0_DQ3
F1GPIO1_9N20VSSW40DDR0_DQ2
F2GPIO1_10N21DVDD_GPUY1VSS
F3VSSN22VSSY2M1_A_SBCK
F4GPIO0_13N23VSSY3VSS
F5GPIO0_12N24VSSY4M0_A_SBCK
F6VSSN25VSSY5VSS
F7AOGPIO0_24N26VSSY6D2D_RZQ
F8AOGPIO1_0N27VSSY7VSS
F9GPIO0_25N28VSSY11VSS
F10RST_N_OUTN29DVDD_NPU_VIPY12VSS
F11AOI2C1_SDAN30DVDD_NPU_VIPY13DVDD_VP
F12VSSN31VSSY14VSS
F13GPIO1_16N34VSSY15DVDD_VP
F14MULTI_DIE_PACKAGEN35GPIO2_11Y16VSS
F15VSSN36VSSY17DVDD08_TOP
F16AOGPIO0_30N37GPIO2_8Y18DVDD08_TOP
F17AOGPIO1_2N38VSSY19DVDD08_TOP
F18VSSN39GPIO2_24Y20DVDD08_TOP
F19MIPI_CSI0_B_DATAP1N40GPIO2_23Y21DVDD08_TOP
F20MIPI_CSI0_B_DATAN0P1VSSY22DVDD08_TOP
F21VSSP2M0_B_DQ1Y23DVDD08_TOP
F22MIPI_CSI1_B_DATAP1P3VSSY24VSS
F23MIPI_CSI1_B_DATAN0P4M0_B_DQ4Y25VSS
F24VSSP5VSSY26VSS
F25VSSP6M0_B_WCKY27VSS
F26MIPI_DSI0_DATAP2P7VSSY28VSS
F27VSSP11VSSY29VSS
F28VSSP12AVDD18_AONY30VSS
F29HDMI_TMDSCLKNP13DVDD08_AONY31VSS
F30VSSP14DVDD08_TOPY32VSS
F31VSSP15DVDD08_TOPY34VSS
F32DPTX_AUX_NP16VSSY35DDR0_DQSTL
F33VSSP17VSSY36DDR0_DQSCL
F34VSSP18DVDD08_TOPY37DDR0_DQ6
F35VSSP19DVDD08_TOPY38VSS
F36USB2_1_IDP20VSSY39VSS
F37VSSP21DVDD_GPUY40DDR0_DQ0
F38GPIO2_3P22VSS

Power On/Off Sequence

Power On Sequence

power on sequence

The parameters in the table below represent the time required for the pins to enable the power supply in sequence.

Parameter (Power on Time Interval)TypicalUnit
AVDD18_AON1000ms
AVDD18_AON to DVDD08_AON2ms
DVDD08_AON to AVDD18_TOP2ms
AVDD18_TOP to AVDD18_PLL_HV2ms
AVDD18_PLL_HV to DVDD08_PLL2ms
DVDD08_USB2_PHY to AVDD18_EMMC_PHY2ms
AVDD18_EMMC_PHY to AVDD33_EMMC_PHY2ms
AVDD33_EMMC_PHY to AVDDH18_USB2_PHY2ms
AVDDH18_USB2_PHY to AVDD33_USB2_PHY2ms
AVDD33_USB2_PHY to DVDD_DDR_SS2ms
DVDD_DDR_SS to DVDD_CPU_SS2ms
DVDD_CPU_SS to DVDDM_CPU_SS2ms
DVDDM_CPU_SS to POR release2ms
POR release6ms

Power Off Sequence

power off seqence

The parameters in the table below represent the time required for the pins to cut off the power supply in sequence.

Parameter (Power Down Time Interval)TypicalUnit
DVDD_VP_SS to DVDD_GPU_SS2ms
DVDD_GPU_SS to DVDD_NPU_VIP2ms
DVDD_NPU_VIP to DVDD_NPU_SS2ms
DVDD_NPU_SS to AVDD08_MIPI_PHY_VP2ms
AVDD08_MIPI_PHY_VP to AVDD18_MIPI_PHY_VPH2ms
AVDD18_MIPI_PHY_VPH to DVDD_CPU_P2ms
DVDD_CPU_P to AVDD33_EMMC_PHY2ms
AVDD33_EMMC_PHY to AVDD18_EMMC_PHY2ms
AVDD18_EMMC_PHY to AVDD18_C10_PHY_VPH2ms
AVDD18_C10_PHY_VPH to AVDD18_E16_PHY_VPH2ms
AVDD18_E16_PHY_VPH to AVDDH18_USB2_PHY2ms
AVDDH18_USB2_PHY to AVDD33_USB2_PHY2ms
AVDD33_USB2_PHY to AVDD18_DDR_PHY_VAA02ms
AVDD18_DDR_PHY_VAA0 to AVDD18_DDR_PHY_VAA12ms
AVDD18_DDR_PHY_VAA1 to AVDD06_DDR_PHY_QLP02ms
AVDD06_DDR_PHY_QLP0 to AVDD06_DDR_PHY_QLP12ms
AVDD06_DDR_PHY_QLP1 to AVDD12_DDR_PHY_VDDQ02ms
AVDD12_DDR_PHY_VDDQ0 to AVDD12_DDR_PHY_VDDQ12ms
AVDD12_DDR_PHY_VDDQ1 to DVDD08_DDR_SS2ms
DVDD08_DDR_SS to DVDDM_CPU_SS2ms
DVDDM_CPU_SS to DVDD_CPU_SS2ms
DVDD_CPU_SS to DVDD08_USB2_PHY2ms
DVDD08_TOP to AVDD18_PLL_HV2ms
AVDD18_PLL_HV to AVDD18_TOP2ms
AVDD18_TOP to DVDD08_AON2ms
DVDD08_AON to AVDD18_AON2ms
AVDD18_AON2ms